Input power ports and/or related components can be protected from undesirable power conditions (e.g., electrostatic discharge (ESD)) using multiple external (e.g., off-board) and/or internal (e.g., on-board) discrete devices such as shunt devices (e.g., zener diodes, TVS devices). When the input power port is protected from undesirable power conditions using multiple devices, unpredictable and/or unwanted interactions can occur between the external and/or internal devices. For example, mismatches between external shunt protection devices added to an integrated circuit, which already includes an internal shunt protection device, can result in unpredictable and/or unwanted interactions in the event of an ESD pulse. Specifically, an internal shunt protection device that has a lower trigger voltage may absorb all energy of the ESD pulse, rendering the external shunt protection devices irrelevant, independent of its “power rating”. In some embodiments, the external and internal shunt protection devices may share the energy of the ESD pulse in some fashion that may or may not protect the integrated circuit. Designing matched internal and external shunt protection devices to avoid many of these issues can be a time-consuming, expensive, and/or trial-and-error process, which may not be feasible in some applications. In addition, common methods of balancing (e.g., adding a series resistor) can have an undesirable level of series resistance during normal operation that can cause, for example, signal attenuation. Thus, a need exists for systems, methods, and apparatus to address the shortfalls of present technology and to provide other new and innovative features.